irq_gc_lock

Name:irq_gc_lock

Proto:static inline void irq_gc_lock(struct irq_chip_generic *gc)

Type:void

Parameter:

Type	Parameter	Name
struct irq_chip_generic *	gc

NULL

**Caller**
Name	Describe
irq_gc_mask_disable_reg	q_gc_mask_disable_reg - Mask chip via disable register@d: irq_data Chip has separate enable/disable registers instead of a single mask* register.
irq_gc_mask_set_bit	q_gc_mask_set_bit - Mask chip via setting bit in mask register@d: irq_data Chip has a single mask register. Values of this register are cached* and protected by gc->lock
irq_gc_mask_clr_bit	q_gc_mask_clr_bit - Mask chip via clearing bit in mask register@d: irq_data Chip has a single mask register. Values of this register are cached* and protected by gc->lock
irq_gc_unmask_enable_reg	q_gc_unmask_enable_reg - Unmask chip via enable register@d: irq_data Chip has separate enable/disable registers instead of a single mask* register.
irq_gc_ack_set_bit	q_gc_ack_set_bit - Ack pending interrupt via setting bit*@d: irq_data
irq_gc_ack_clr_bit	q_gc_ack_clr_bit - Ack pending interrupt via clearing bit*@d: irq_data
irq_gc_mask_disable_and_ack_set	q_gc_mask_disable_and_ack_set - Mask and ack pending interrupt@d: irq_data This generic implementation of the irq_mask_ack method is for chips* with separate enable/disable registers instead of a single mask* register and where a pending interrupt is
irq_gc_eoi	q_gc_eoi - EOI interrupt*@d: irq_data
irq_gc_set_wake	q_gc_set_wake - Set/clr wake bit for an interrupt@d: irq_data@on: Indicates whether the wake bit should be set or cleared* For chips where the wake from suspend functionality is not* configured in a separate register and the wakeup active state is

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