函数逻辑报告

Linux Kernel

v5.5.9

Brick Technologies Co., Ltd

Source Code:include\linux\irq.h Create Date:2022-07-27 08:32:18
Last Modify:2020-03-12 14:18:49 Copyright©Brick
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函数名称:irq_gc_lock

函数原型:static inline void irq_gc_lock(struct irq_chip_generic *gc)

返回类型:void

参数:

类型参数名称
struct irq_chip_generic *gc

NULL

调用者
名称描述
irq_gc_mask_disable_regq_gc_mask_disable_reg - Mask chip via disable register*@d: irq_data* Chip has separate enable/disable registers instead of a single mask* register.
irq_gc_mask_set_bitq_gc_mask_set_bit - Mask chip via setting bit in mask register*@d: irq_data* Chip has a single mask register. Values of this register are cached* and protected by gc->lock
irq_gc_mask_clr_bitq_gc_mask_clr_bit - Mask chip via clearing bit in mask register*@d: irq_data* Chip has a single mask register. Values of this register are cached* and protected by gc->lock
irq_gc_unmask_enable_regq_gc_unmask_enable_reg - Unmask chip via enable register*@d: irq_data* Chip has separate enable/disable registers instead of a single mask* register.
irq_gc_ack_set_bitq_gc_ack_set_bit - Ack pending interrupt via setting bit*@d: irq_data
irq_gc_ack_clr_bitq_gc_ack_clr_bit - Ack pending interrupt via clearing bit*@d: irq_data
irq_gc_mask_disable_and_ack_setq_gc_mask_disable_and_ack_set - Mask and ack pending interrupt*@d: irq_data* This generic implementation of the irq_mask_ack method is for chips* with separate enable/disable registers instead of a single mask* register and where a pending interrupt is
irq_gc_eoiq_gc_eoi - EOI interrupt*@d: irq_data
irq_gc_set_wakeq_gc_set_wake - Set/clr wake bit for an interrupt*@d: irq_data*@on: Indicates whether the wake bit should be set or cleared* For chips where the wake from suspend functionality is not* configured in a separate register and the wakeup active state is