Function report

Linux Kernel

v5.5.9

Brick Technologies Co., Ltd

Source Code:kernel\bpf\core.c Create Date:2022-07-28 12:48:20
Last Modify:2020-03-12 14:18:49 Copyright©Brick
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Annotation kernel can get tool activityDownload SCCTChinese

Name:__bpf_prog_run - run eBPF program on a given context*@regs: is the array of MAX_BPF_EXT_REG eBPF pseudo-registers*@insn: is the array of eBPF instructions*@stack: is the eBPF storage stack* Decode and execute eBPF instructions.

Proto:static u64 __no_fgcse ___bpf_prog_run(u64 *regs, const struct bpf_insn *insn, u64 *stack)

Type:u64

Parameter:

TypeParameterName
u64 *regs
const struct bpf_insn *insn
u64 *stack
1365  static const void * const jumptable[256]__annotate_jump_table = {[0...255] = && default_label, All UAPI available opcodes. (__bpf_prog_run - run eBPF program on a given context*@regs: is the array of MAX_BPF_EXT_REG eBPF pseudo-registers*@insn: is the array of eBPF instructions*@stack: is the eBPF storage stack* Decode and execute eBPF instructions., BPF_INSN_3_LBL), [BPF_JMP | unused opcode to mark call to interpreter with arguments ] = && JMP_CALL_ARGS, [BPF_JMP | unused opcode to mark special call to bpf_tail_call() helper ] = && JMP_TAIL_CALL, [BPF_LDX | unused opcode to mark special load instruction. Same as BPF_ABS | 8-bit ] = && LDX_PROBE_MEM_B, [BPF_LDX | unused opcode to mark special load instruction. Same as BPF_ABS | 16-bit ] = && LDX_PROBE_MEM_H, [BPF_LDX | unused opcode to mark special load instruction. Same as BPF_ABS | 32-bit ] = && LDX_PROBE_MEM_W, [BPF_LDX | unused opcode to mark special load instruction. Same as BPF_ABS | double word (64-bit) ] = && LDX_PROBE_MEM_DW, }
1379  tail_call_cnt = 0
1384  select_insn :
1385  Go to jumptable[ opcode ]
1402  ALU (ADD, + )
1403  ALU (SUB, - )
1404  ALU (AND, & )
1405  ALU (OR, | )
1406  ALU (LSH, << )
1407  ALU (RSH, >> )
1408  ALU (XOR, ^ )
1409  ALU (MUL, * )
1411  ALU_NEG :
1412  Named registers = (u32) - Named registers
1413  CONT
1414  ALU64_NEG :
1415  Named registers = -Named registers
1416  CONT
1417  ALU_MOV_X :
1418  Named registers = SRC
1419  CONT
1420  ALU_MOV_K :
1421  Named registers = IMM
1422  CONT
1423  ALU64_MOV_X :
1424  Named registers = SRC
1425  CONT
1426  ALU64_MOV_K :
1427  Named registers = IMM
1428  CONT
1429  LD_IMM_DW :
1430  Named registers = signed immediate constant | signed immediate constant << 32
1431  insn++
1432  CONT
1433  ALU_ARSH_X :
1434  Named registers = Named registers >> SRC
1435  CONT
1436  ALU_ARSH_K :
1437  Named registers = Named registers >> IMM
1438  CONT
1439  ALU64_ARSH_X :
1440  ( * (s64 * ) & Named registers ) >>= SRC
1441  CONT
1442  ALU64_ARSH_K :
1443  ( * (s64 * ) & Named registers ) >>= IMM
1444  CONT
1445  ALU64_MOD_X :
1446  div64_u64_rem - unsigned 64bit divide with 64bit divisor and remainder*@dividend: 64bit dividend*@divisor: 64bit divisor*@remainder: 64bit remainder* This implementation is a comparable to algorithm used by div64_u64
1447  Named registers = AX
1448  CONT
1449  ALU_MOD_X :
1450  AX = Named registers
1451  Named registers = do_div() is NOT a C function(AX, (u32)SRC)
1452  CONT
1453  ALU64_MOD_K :
1454  div64_u64_rem - unsigned 64bit divide with 64bit divisor and remainder*@dividend: 64bit dividend*@divisor: 64bit divisor*@remainder: 64bit remainder* This implementation is a comparable to algorithm used by div64_u64
1455  Named registers = AX
1456  CONT
1457  ALU_MOD_K :
1458  AX = Named registers
1459  Named registers = do_div() is NOT a C function(AX, (u32)IMM)
1460  CONT
1461  ALU64_DIV_X :
1462  Named registers = div64_u64 - unsigned 64bit divide with 64bit divisor*@dividend: 64bit dividend*@divisor: 64bit divisor* This implementation is a modified version of the algorithm proposed* by the book 'Hacker's Delight'. The original source and full proof
1463  CONT
1464  ALU_DIV_X :
1465  AX = Named registers
1466  do_div() is NOT a C function(AX, (u32)SRC)
1467  Named registers = AX
1468  CONT
1469  ALU64_DIV_K :
1470  Named registers = div64_u64 - unsigned 64bit divide with 64bit divisor*@dividend: 64bit dividend*@divisor: 64bit divisor* This implementation is a modified version of the algorithm proposed* by the book 'Hacker's Delight'. The original source and full proof
1471  CONT
1472  ALU_DIV_K :
1473  AX = Named registers
1474  do_div() is NOT a C function(AX, (u32)IMM)
1475  Named registers = AX
1476  CONT
1477  ALU_END_TO_BE :
1479  Case IMM == 16
1480  Named registers = cpu_to_be16(Named registers )
1481  Break
1482  Case IMM == 32
1483  Named registers = cpu_to_be32(Named registers )
1484  Break
1485  Case IMM == 64
1486  Named registers = cpu_to_be64(Named registers )
1487  Break
1489  CONT
1490  ALU_END_TO_LE :
1492  Case IMM == 16
1493  Named registers = cpu_to_le16(Named registers )
1494  Break
1495  Case IMM == 32
1496  Named registers = cpu_to_le32(Named registers )
1497  Break
1498  Case IMM == 64
1499  Named registers = The following macros are to be defined by (Named registers )
1500  Break
1502  CONT
1505  JMP_CALL :
1510  Registers = (Base function for offset calculation. Needs to go into .text section,* therefore keeping it non-static as well; will also be used by JITs* anyway later on, so do not let the compiler omit it. This also needs* to go into kallsyms for correlation from e + signed immediate constant )(BPF_R1, BPF_R2, BPF_R3, BPF_R4, BPF_R5)
1512  CONT
1514  JMP_CALL_ARGS :
1515  Registers = (__bpf_call_base_args + signed immediate constant )(BPF_R1, BPF_R2, BPF_R3, BPF_R4, BPF_R5, insn + signed offset + 1)
1519  CONT
1521  JMP_TAIL_CALL :
1522  map = BPF_R2
1523  array = container_of - cast a member of a structure out to the containing structure*@ptr: the pointer to the member.*@type: the type of the container struct this is embedded in.*@member: the name of the member within the struct.(map, structbpf_array, map)
1525  index = BPF_R3
1527  If Value for the false possibility is greater at compile time(index >= max_entries) Then Go to out
1529  If Value for the false possibility is greater at compile time(tail_call_cnt > MAX_TAIL_CALL_CNT) Then Go to out
1532  tail_call_cnt++
1534  prog = READ_ONCE(ptrs[index])
1535  If Not prog Then Go to out
1543  insn = insnsi
1544  Go to select_insn
1545  out :
1546  CONT
1548  JMP_JA :
1549  insn += signed offset
1550  CONT
1551  JMP_EXIT :
1552  Return Registers
1579  JMP (u, JEQ, == )
1580  JMP (u, JNE, != )
1581  JMP (u, JGT, > )
1582  JMP (u, JLT, < )
1583  JMP (u, JGE, >= )
1584  JMP (u, JLE, <= )
1585  JMP (u, JSET, & )
1586  JMP (s, JSGT, > )
1587  JMP (s, JSLT, < )
1588  JMP (s, JSGE, >= )
1589  JMP (s, JSLE, <= )
1603  STX and ST and LDX(B, u8)
1604  STX and ST and LDX(H, u16)
1605  STX and ST and LDX(This "rolls" over the 512-bit array , u32)
1606  STX and ST and LDX(DW, u64)
1612  LDX_PROBE(B, 1)
1613  LDX_PROBE(H, 2)
1614  LDX_PROBE(This "rolls" over the 512-bit array , 4)
1615  LDX_PROBE(DW, 8)
1618  STX_XADD_W :
1619  atomic_add((u32)SRC, (atomic_t * )(unsignedlong)(Named registers + signed offset ))
1621  CONT
1622  STX_XADD_DW :
1623  atomic64_add((u64)SRC, (atomic64_t * )(unsignedlong)(Named registers + signed offset ))
1625  CONT
1627  default_label :
1634  pr_warn("BPF interpreter: unknown opcode %02x\n", opcode )
1635  BUG_ON(1)
1636  Return 0
Caller
NameDescribe
__bpf_prog_run32
__bpf_prog_run64
__bpf_prog_run96
__bpf_prog_run128
__bpf_prog_run160
__bpf_prog_run192
__bpf_prog_run224
__bpf_prog_run256
__bpf_prog_run288
__bpf_prog_run320
__bpf_prog_run352
__bpf_prog_run384
__bpf_prog_run416
__bpf_prog_run448
__bpf_prog_run480
__bpf_prog_run512
__bpf_prog_run_args32
__bpf_prog_run_args64
__bpf_prog_run_args96
__bpf_prog_run_args128
__bpf_prog_run_args160
__bpf_prog_run_args192
__bpf_prog_run_args224
__bpf_prog_run_args256
__bpf_prog_run_args288
__bpf_prog_run_args320
__bpf_prog_run_args352
__bpf_prog_run_args384
__bpf_prog_run_args416
__bpf_prog_run_args448
__bpf_prog_run_args480
__bpf_prog_run_args512