Function report |
Source Code:arch\x86\kernel\cpu\cyrix.c |
Create Date:2022-07-28 07:58:55 |
Last Modify:2020-03-12 14:18:49 | Copyright©Brick |
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Annotation kernel can get tool activity | Download SCCT | Chinese |
Name:init_cyrix
Proto:static void init_cyrix(struct cpuinfo_x86 *c)
Type:void
Parameter:
Type | Parameter | Name |
---|---|---|
struct cpuinfo_x86 * | c |
193 | dir1 = 0 |
194 | buf = x86_model_id |
195 | const char * p = NULL |
201 | clear_cpu_cap(c, 0 * 32 + 31) |
204 | If test_cpu_cap(c, 1 * 32 + 24) Then |
205 | clear_cpu_cap(c, 1 * 32 + 24) |
206 | set_cpu_cap(c, Cyrix MMX extensions ) |
209 | do_cyrix_devid( & dir0, & dir1) |
218 | x86_stepping = dir1 & 0xf |
229 | Case dir0_msn == 0 |
230 | p = Cx486_name[dir0_lsn & 7] |
231 | Break |
233 | Case dir0_msn == 1 |
234 | p = If dir0_lsn & 8 Then Cx486D_name[dir0_lsn & 5] Else Cx486S_name[dir0_lsn & 3] |
236 | Break |
238 | Case dir0_msn == 2 |
243 | Case dir0_msn == 3 |
244 | Cx86_cb[1] = ' ' |
245 | Cx86_cb[2] = cyrix_model_mult1[dir0_lsn & 5] |
246 | If dir1 > 0x21 Then |
253 | set_cpu_cap(c, Cyrix ARRs (= MTRRs) ) |
255 | set_cpu_bug(c, Cyrix 6x86 coma ) |
256 | Break |
258 | Case dir0_msn == 4 |
259 | Case dir0_msn == 11 |
297 | If Maximum supported CPUID level, -1=no CPUID: == 2 Then |
299 | setCx86(CX86_CCR7, NSC/Cyrix CPU indexed register access. Must be inlined instead of* macros to ensure correct access ordering* Access order is always 0x22 (=offset), 0x23 (=value) | 1) |
307 | If 0x30 <= dir1 && dir1 <= 0x6f || 0x80 <= dir1 && dir1 <= 0x8f Then Configure later MediaGX and/or Geode processor. |
310 | Return |
311 | Else |
316 | Break |
318 | Case dir0_msn == 5 |
319 | If dir1 > 7 Then |
320 | dir0_msn++ |
323 | Else |
325 | set_cpu_bug(c, Cyrix 6x86 coma ) |
328 | Cx86_cb[tmp] = cyrix_model_mult2[dir0_lsn & 7] |
333 | set_cpu_cap(c, Cyrix ARRs (= MTRRs) ) |
334 | Break |
336 | Case dir0_msn == 0xf |
350 | Default |
351 | dir0_msn = 7 |
352 | Break |
354 | strcpy(buf, Cx86_model[dir0_msn & 7]) |
357 | Return |
Name | Describe |
---|---|
init_nsc | Handle National Semiconductor branded processors |
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