Function report |
Source Code:arch\x86\kernel\cpu\bugs.c |
Create Date:2022-07-28 07:56:27 |
Last Modify:2020-03-12 14:18:49 | Copyright©Brick |
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Name:These CPUs all support 44bits physical address space internally in the* cache but CPUID can report a smaller number of physical address bits.* The L1TF mitigation uses the top most address bit for the inversion of* non present PTEs
Proto:static void override_cache_bits(struct cpuinfo_x86 *c)
Type:void
Parameter:
Type | Parameter | Name |
---|---|---|
struct cpuinfo_x86 * | c |
1312 | If CPU family != 6 Then Return |
1316 | Case x86_model == INTEL_FAM6_NEHALEM |
1317 | Case x86_model == INTEL_FAM6_WESTMERE |
1318 | Case x86_model == INTEL_FAM6_SANDYBRIDGE |
1319 | Case x86_model == INTEL_FAM6_IVYBRIDGE |
1320 | Case x86_model == INTEL_FAM6_HASWELL |
1321 | Case x86_model == INTEL_FAM6_HASWELL_L |
1322 | Case x86_model == INTEL_FAM6_HASWELL_G |
1323 | Case x86_model == INTEL_FAM6_BROADWELL |
1324 | Case x86_model == INTEL_FAM6_BROADWELL_G |
1325 | Case x86_model == INTEL_FAM6_SKYLAKE_L |
1326 | Case x86_model == INTEL_FAM6_SKYLAKE |
1327 | Case x86_model == INTEL_FAM6_KABYLAKE_L |
1328 | Case x86_model == INTEL_FAM6_KABYLAKE |
1329 | If Address space bits used by the cache internally < 44 Then Address space bits used by the cache internally = 44 |
1331 | Break |
Name | Describe |
---|---|
l1tf_select_mitigation |
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