inb

类型	参数	名称
u16	port

**调用者**
名称	描述
i8254
empty_8042
enable_a20_fast
early_serial_init	串口初始化
probe_baud	取串口波特率
serial_putchar	These functions are in .inittext so they can be used to signal* error during initialization.
vga_crtc	I/O address of the VGA CRTC
vga_set_480_scanlines
i8259A_irq_pending
i8259A_irq_real	This function assumes to be called rarely. Switching between* 8259A registers is slow.* This has to be protected by the irq controller spinlock* before being called.
mask_and_ack_8259A	Careful! The 8259A is a fragile beast, it pretty* much _has_ to be done exactly like this (mask it* first, _then_ send the EOI, and the order of EOI* to the two 8259s is important!
save_ELCR
probe_8259A
pit_calibrate_tsc	Try to calibrate the TSC against the Programmable* Interrupt Timer and return the frequency of the TSC* in kHz.* Return ULONG_MAX on failure to calibrate.
pit_verify_msb	This reads the current MSB of the PIT counter, and* checks if we are running on sufficiently fast and* non-virtualized hardware
quick_pit_calibrate
rtc_cmos_read	Routines for accessing the CMOS RAM/RTC.
acpi_pic_sci_set_trigger	acpi_pic_sci_set_trigger()* use ELCR to set PIC-mode trigger type for SCI* If a PIC-mode SCI is not recognized or gives spurious IRQ7's* it may require Edge Trigger -- use "acpi_sci=edge"* Port 0x4d0-4d1 are ECLR1 and ECLR2, the Edge/Level Control
kb_wait
native_machine_emergency_restart	To the best of our knowledge Windows compatible x86 hardware expects* the following on reboot:* 1) If the FADT has the ACPI reboot register flag set, try it* 2) If still alive, write to the keyboard controller* 3) If still alive, write to the ACPI reboot
print_PIC
io_serial_in
kdb_get_kbd_char	Check if the keyboard controller has a keypress for us.* Some parts (Enter Release, LED change) are still blocking polled here,* but hopefully they are all short.
kdb_kbd_cleanup_state	Best effort cleanup of ENTER break codes on leaving KDB. Called on* exiting KDB, when we know we processed an ENTER or KP ENTER scan* code.
in_idx	Accessing VGA indexed registers
reassert_nmi
inb_pic	he PIC may need a careful delay on some platforms, hence specific calls
getCx86	NSC/Cyrix CPU indexed register access. Must be inlined instead of* macros to ensure correct access ordering* Access order is always 0x22 (=offset), 0x23 (=value)

函数逻辑报告